1. Field of the Invention
The present invention relates to a semiconductor device having a multi-chip module configuration and a method of manufacturing the same. More particularly, the present invention relates to a semiconductor device on which a logic chip and a memory chip are mounted, another semiconductor device on which a plurality of memory chips are mounted to assure a large memory capacity, or a further semiconductor device on which a plurality of semiconductor chips which are manufactured by different processes or are made of different materials are mounted and a method of manufacturing the semiconductor devices.
2. Description of the Related Art
FIG. 1 is a sectional view showing a conventional semiconductor device disclosed in Japanese Patent Laid-Open No. 191256/1997. As shown in FIG. 1, in the conventional semiconductor device, a semiconductor element mounting board 103 having a plurality of semiconductor elements 102 mounted on the opposite surfaces thereof is supported on and electrically connected to external connection terminal supporting substrate 101 by solder 104. An external connection terminals 101a such as solder bumps are provided on the rear surface of external connection terminal supporting substrate 101. A semiconductor element mounting board 103 is encapsulated by an encapsulation resin 105.
Each semiconductor element 102 is connected to wiring patterns 103a formed on semiconductor element mounting board 103 by bonding wires 106. Further, wiring patterns 103a on semiconductor element mounting board 103 and wiring patterns 101b on external connection terminal supporting substrate 101 are connected to each other by bonding wires 107. Accordingly, each semiconductor element 102 and corresponding external connection terminals 101a are electrically connected to each other.
A process of mounting semiconductor elements 102 on semiconductor element mounting board 103 will be described.
First, semiconductor elements 102 are mounted on one of the surfaces of semiconductor element mounting board 103, and semiconductor element mounting board 103 and semiconductor elements 102 are connected to each other by wire bonding. Then, semiconductor element mounting board 103 is reversed. Then, semiconductor elements 102 are mounted on the other surface of semiconductor element mounting board 103, and semiconductor element mounting board 103 and semiconductor elements 102 are connected to each other by wire bonding. Thus, semiconductor elements 102 are mounted on the opposite surfaces of semiconductor element mounting board 103.
In the conventional semiconductor device, the use of the opposite surfaces of semiconductor element mounting board 103 as mounting surfaces for semiconductor elements 102 facilitates the mounting of a plurality of semiconductor elements 102 on semiconductor element mounting board 103. Further, in the conventional semiconductor, since electric connections are shared among external connection terminal supporting substrate 101 and semiconductor element mounting board 103, even when a plurality of semiconductor elements 102 of different kinds are mounted on semiconductor element mounting board 103, it is possible to use external connection terminal supporting substrate 101 and semiconductor element mounting board 103. This results in reduction of the manufacturing cost.
In another conventional semiconductor device shown in FIGS. 2 and 3, first semiconductor chip 202 is mounted on substrate 201 which has wiring patterns 208 formed on the front surface thereof. Further, a second semiconductor chip 203 is adhered to first semiconductor chip 202 by insulating adhesive tape 207 or the like. In this manner, the second conventional semiconductor device has a plurality of semiconductor chips mounted thereon, which is a so-called chip stack structure. Each semiconductor chip 202, 203 is mounted on substrate 201 such that the surface thereof on which bonding pads are formed is directed upwardly. Solder bumps 205 are provided on the rear surface of substrate 201 (see FIG. 3).
First semiconductor chip 202 and second semiconductor chip 203 are connected to each other by bonding wires 204a which connect bonding pads of the semiconductor chips to each other. Further, first semiconductor chip 202 and wiring patterns 208 of substrate 201 are connected to each other by bonding wires 204b, and second semiconductor chip 203 and wiring patterns 208 of substrate 201 are connected to each other by bonding wires 204c. Wiring patterns 208 formed on the front surface of substrate 201 and solder bumps 205 provided on the rear surface of substrate 201 are connected to each other via through holes (not shown). Thus, the electrical connection between semiconductor chips 202, 203 and solder bumps 205 is established. Further, the upper surface of substrate 201 is encapsulated with encapsulation resin 206 to provide hermetic seal with wiring patterns 208, semiconductor chips 202, 203 and each bonding wires.
A process of manufacturing the conventional semiconductor device shown in FIGS. 2 and 3 will be described.
First, conductive bonding agent such as silver paste is applied to the upper surface of substrate 201 to make first semiconductor chip 202 adhered to the upper surface of substrate 201. Then, insulating adhesive tape 207 is stuck on the upper surface of first semiconductor chip 202, and second semiconductor chip 203 is adhered to first semiconductor chip 202. Thereafter, substrate 201 on which semiconductor chips 202, 203 are mounted is baked. Then, bonding wires 204a, 204b, 204c are bonded to semiconductor chips 202, 203 and substrate 201 by a popular wire bonding method. Then, encapsulation resin 206 is poured onto the upper surface of substrate 201 to hermetically seal semiconductor chips 203, 203, wiring patterns 208, and the bonding wires. Finally, solder bumps 205 are joined to the through holes on the rear surface of substrate 201. Thus, the conventional semiconductor device is completed.
However, the conventional semiconductor device shown in FIG. 1 requires two substrates of external connection terminal supporting substrate 101 and semiconductor element mounting board 103 as a substrate on which semiconductor elements 102 are to be mounted. This in turn increases the number of components required for the semiconductor device, hindering reduction in the cost of the semiconductor device. Further, because of the construction that the semiconductor element mounting board 103 is supported on external connection terminal supporting substrate 101, the conventional semiconductor device has a thickness greater than the total thickness of at least two substrates, making it difficult to reduce the thickness of the package.
In addition, the process of mounting semiconductor elements 102 on semiconductor element mounting board 103 requires reversal of semiconductor element mounting board 103 after semiconductor elements 102 are mounted on one of the surfaces of semiconductor element mounting board 103, making the wire bonding process complicated. Further, there is a risk that short-circuiting between the wires may occur due to contact between them during the reversal of semiconductor element mounting board 103, as a result of a possible crush of bonding wires 106 connected already by a substrate transporting jig (not shown) of the mounting apparatus. This presents an obstacle to the improvement of yields and the quality of the semiconductor device.
Meanwhile, in the conventional semiconductor device described with reference to FIGS. 2 and 3, bonding wires 204b for connecting first semiconductor chip 202 and substrate 201 to each other are relatively long. Therefore, there arises a phenomenon that, when encapsulation resin 206 is poured onto substrate 201, bonding wires 204b are distorted to thereby cause mutual contact of adjacent bonding wires. Thus, there is a possibility that short-circuiting between wires may occur.
Since the conventional semiconductor device is of a construction that semiconductor chips 202, 203 are layered on single substrate 201, it has a reduced thickness as compared with the conventional semiconductor device shown in FIG. 1 which includes two substrates layered one on the other. However, in recent years, with the process of high density mounting, particularly in the fields of portable personal computers and portable telephone sets, there has been growing demands for decreasing the height of a semiconductor device during mounting.